Publications

A Unified Forward Error Correction (FEC) Accelerator for Multi-Mode Turbo, LDPC, and Polar Decoding

Published in ISLPED: Proceedings of the ACM/IEEE International Symposium on Low Power Electronics and Design, 2022

Proposed a unified architecture for FECs and implemented in ASIC.

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Published in Embedded Computer Systems: Architectures, Modeling, and Simulation (SAMOS), 2020

Speculative TLB and nearest-entry TLB translation prediction by exploiting contiguity in physical address allocation.

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